Understanding Temperature Effects on 3D NAND Flash Memory Erase Operations
Author Information
Author(s): Refaldi David G., Malavena Gerardo, Chiavarone Luca, Spinelli Alessandro S., Monzio Compagnoni Christian
Primary Institution: Politecnico di Milano
Hypothesis
What is the impact of temperature on the erase operation in 3D NAND flash memories?
Conclusion
The effectiveness of the erase operation in 3D NAND flash memories decreases as the temperature is reduced, primarily due to the weakening of the gate-induced drain leakage current.
Supporting Evidence
- Experimental data show that lower temperatures make it harder to erase memory cells.
- The study correlates the temperature-induced changes in electrostatic potential with the changes in erased threshold voltage.
- Both charge-trap and floating-gate memory cells were investigated, confirming the findings across different storage layers.
Takeaway
When it gets colder, it becomes harder to erase data from 3D NAND flash memory. This is because the way the memory works changes with temperature.
Methodology
The study involved experimental measurements and modeling of the erase operation in 3D NAND flash arrays across a wide temperature range from 300 K to 15 K.
Potential Biases
One author is employed by Micron Technology Inc., which may introduce potential conflicts of interest.
Limitations
The original data presented in the study are not available due to confidentiality reasons.
Digital Object Identifier (DOI)
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