Improved Performance of 10 nm GAAFET with Strained Silicon Channel
Author Information
Author(s): Yugender Potaraju, Dhar Rudra Sankar, Nanda Swagat, Kumar Kuleen, Sakthivel Pandurengan, Thirumurugan Arun
Primary Institution: Department of Electronics and Communication Engineering, National Institute of Technology Mizoram, Aizawl, India
Hypothesis
The integration of a strained silicon channel in a 10 nm Gate-All-Around Field-Effect Transistor (GAAFET) will enhance its electrical performance.
Conclusion
The 10 nm GAAFET with a strained silicon channel shows superior performance compared to larger devices, with significantly improved on current and reduced short channel effects.
Supporting Evidence
- The 10 nm GAAFET achieved an on current of 1.51 mA/µm, significantly higher than the 22 nm GAAFET.
- The Ion/Ioff ratio of the 10 nm GAAFET was 5.71 × 10^5, indicating excellent switching performance.
- The subthreshold swing of the device was measured at 72.42 mV/decade, which is lower than that of larger devices.
Takeaway
This study shows that using a special type of silicon in tiny transistors can make them work better and faster.
Methodology
The study involved modeling and comparing the electrical properties of a 10 nm GAAFET with a strained silicon channel against other existing devices.
Digital Object Identifier (DOI)
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